(MTRR) Registers in the pentium pro and pentium ii processors that can be used to specify a strategy for communication with the external memory and caches for a number of physical address ranges.

Strategies include write-through, write-back, or uncached(?). Such control is useful where the memory is located on a device and is accessed via some kind of device bus, e.g. a pci or agp graphics card, where caching would be of no benefit.